"2026 SK hynix Future Forum" Held
Participation from Anthropic, Author Song Kilyoung, and Academia
Kwak: "We Must Adapt Flexibly to the Pace of External Change"
"Full Stack AI Memory" Strategy Unveiled

Nojung Kwak, President and CEO of SK hynix, emphasized the need to break away from conventional thinking and adopt an "external-centric" perspective in the rapidly changing era of artificial intelligence (AI).

Kwak Nojung, President and CEO of SK hynix, is delivering a greeting at the "2026 SK hynix Future Forum" held on the 8th at the SUPEX Center on the Icheon campus. SK hynix Newsroom

Kwak Nojung, President and CEO of SK hynix, is delivering a greeting at the "2026 SK hynix Future Forum" held on the 8th at the SUPEX Center on the Icheon campus. SK hynix Newsroom

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At the "2026 SK hynix Future Forum" held at the SUPEX Center on the Icheon Campus of SK hynix on September 8, Kwak stated, "We need to shift our perspective from inside to outside and reevaluate what we have taken for granted from the vantage point of our customers and partners. Within the changing AI ecosystem, we should discover new possibilities that have not been considered before."


He added, "If the past memory market was like a 'straight road' where the competition was about who could run faster, now it is akin to driving on a constantly changing 'curved road.' It is crucial not only to strengthen our internal capabilities but also to closely monitor the speed and direction of external environmental changes and to adapt flexibly and quickly."


The theme of this forum, "Golden Hour of the AI Era: AI Memory Solution Creators Are Changing the World," was designed to define the path SK hynix should pursue in the age of AI and to enhance employees' insights.


Thariq Shihipar, Chief Product Officer at Anthropic, delivered a keynote on "Collaboration between Humans and AI: How Will Our Work Change?" and emphasized that the semiconductor industry can also build "software factories" by utilizing AI in various tasks. He stressed the importance of establishing systems wherein AI itself can verify outcomes.


Vice President Jaeuk Joo of SK hynix introduced the company's work innovation cases, explaining that "we are preparing to manage fab production operations through the 'GaiA' platform, as well as deploying robots for safety supervision and visual language model (VLM) drones for high-altitude tasks, thus utilizing AI across various fronts."


In a subsequent presentation on "Memory Solutions Required in the AI Era," Professor Sungro Yoon of Seoul National University pointed out that as AI evolves into agentic forms, it is becoming difficult to respond with just one type of general-purpose memory. He predicted that designing memory hierarchies tailored to the characteristics of each AI workload will become a key competitive edge for future AI systems.


Juyoung Kim, CEO of HyperAccel, also emphasized the need to address new bottlenecks related to memory capacity and bandwidth, suggesting that high bandwidth memory (HBM), D-Lab, compute express link (CXL), and solid-state drives (SSD), along with new memory hierarchies, should be utilized according to workload requirements. He stressed that the performance and total cost of ownership of AI infrastructure must be improved together by optimizing them at the system level together with diverse accelerators.


Ichul Lim, Vice President of SK hynix, presented the company’s "Full Stack AI Memory" strategy to cope with such changes. The core is to combine diverse memory types based on workload characteristics and to co-design optimal solutions at the system level with ecosystem partners such as AI service providers, software companies, and accelerator developers.



In the keynote on "Expanding Memory Boundaries with 3D Technology," Vice Presidents Kyunghoon Kim and Hoyoung Son of SK hynix shared the direction and challenges of the 3D technology the company is preparing. The main technological directions highlighted included maximizing data bus bandwidth, ultra-short-distance transmission, and utilizing logic foundries for DRAM peripheral circuits.


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